Various products including hard disk drives utilize a read channel device to retrieve information from a medium and decode and convert the information to a digital data format. Such read channel devices may include data processing circuits including encoder and decoder circuits or endecs to encode and decode data as it is stored and retrieved from a medium or transmitted through a data channel, in order to reduce the likelihood of errors in the retrieved data. It is important that the read channel devices be able to rapidly and accurately decode the original stored data patterns in retrieved or received data samples.
Typically, data is encoded and stored or transmitted from most significant bit (MSB) to least significant bit (LSB), and decoded in the opposite order. Because the data is decoded in the reverse order from the encoding and the retrieval or reception, data is buffered before the decoding process begins. This introduces a long latency, particularly when the block of data being encoded and decoded is long.
Thus, for at least the aforementioned reason, there exists a need in the art for reducing latency in data processing circuits.